library ieee;
use ieee.std_logic_1164.all;
use work.Achtung_const.all;

entity RAM_Data_To_Colors is 
	port (
	code						: in RAM_Data;
	r,g,b						: out std_logic
	);
end entity;

Architecture arch1 of RAM_Data_To_Colors is
begin
	process(code)
	begin
		case code is
			when BACKGROUND => 
				r <= '0';
				g <= '0';
				b <= '0';
			when PLAYER1 =>
				r <= '1';
				g <= '0';
				b <= '0';
			when PLAYER2 =>
				r <= '0';
				g <= '1';
				b <= '0';
			when UNUSED =>
				r <= '1';
				g <= '1';
				b <= '1';			
		end case;
	end process;
end architecture;